View ADUM2400_2278415.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

quad-channel digital isolators, 5kv preliminary technical data ADUM2400/adum2401/adum2402 rev. prd october 5, 2004 information furnished by analog devices is believed to be a ccurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to chan ge without notice. no license is granted by implication or otherwise under any patent or patent ri ghts of analog devices. trademarks and registered trademarks are the prop erty of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.326.8703 ? 2004 analog devices, inc. all rights reserved. features low power operation 5 v operation: 1.0 ma per channel max @ 0C2 mbps 3.5 ma per channel max @ 10 mbps 31 ma per channel max @ 90 mbps 3 v operation: 0.7 ma per channel max @ 0C2 mbps 2.1 ma per channel max @ 10 mbps 20 ma per channel max @ 90 mbps bidirectional communication 3 v/5 v level translation high temperature operation: 105c high data rate: dcC90 mbps (nrz) precise timing characteristics: 2 ns max. pulsewidth distortion 2 ns max. channel-to-channel matching high common-mode transient immunity: > 25 kv/s output enable function wide body soic 16-lead package safety and regulatory approvals (pending) ul recognition: 5000 v rms for 1 minute per ul 1577 csa component acceptance notice #5a vde certificate of conformity din en 60747-5-2 (vde 0884 part 2): 2003-01 din en 60950 (vde 0805):2001-12;en 60950:2000 v iorm = 848 v peak iec 60601-1 applications general-purpose, high voltage, multichannel isolation medical equipment motor drives power supplies general description the adum240x are four-channel digital isolators based on analog devices i coupler? technology. combining high speed cmos and monolithic air core transformer technology, these isolation components provide outstanding performance characteristics superior to alternatives such as optocoupler devices. in comparison to the 2.5kv adum140x product family, adum240x models have increased insulation thickness to achieve the higher 5.0kv isolation rating. by avoiding the use of leds and photodiodes, i coupler devices remove the design difficulties commonly associated with optocouplers. the typical optocoupler concerns regarding uncertain current transfer ratios, nonlinear transfer functions, and temperature and lifetime effects are eliminated with the simple, i coupler digital interfaces and stable performance characteristics. the need for external drivers and other discretes is eliminated with these i coupler products. furthermore, i coupler devices run at one-tenth to one-sixth the power consumption of optocouplers at comparable signal data rates. the adum240x isolators provide four independent isolation channels in a variety of channel configurations and data rates (see ordering guide). all adum240x models operate with the supply voltage of either side ranging from 2.7 v to 5.5 v, providing compatibility with lower voltage systems as well as enabling a voltage translation functionality across the isolation barrier. in addition, the adum240x provides low pulse width distortion (<2 ns for crwz grade), and tight channel-to-channel matching (<2 ns for crwz grade). unlike other optocoupler alternatives, the adum240x isolators have a patented refresh feature that ensures dc correctness in the absence of input logic transitions and during power-up/power-down conditions. functional block diagrams encode decode encode decode encode decode encode decode v dd1 g nd 1 v ia v ib v ic v id nc g nd 1 v dd2 gnd 2 v oa v ob v oc v od v e2 gnd 2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 03786-0-001 figure 1. ADUM2400 functional block diagram v dd1 1 v dd2 16 gnd 1 2 gnd 2 15 v e1 7 v e2 10 gnd 1 8 gnd 2 9 decode encode 3 14 v ia v oa decode encode 4 13 v ib v ob v ic 5 v oc decode encode 6 11 v od v id encode decode 12 figure 2. adum2401 functional block diagram decode decode encode encode encode decode encode decode v dd1 gnd 1 v ia v ib v oc v od v e1 gnd 1 v dd2 gnd 2 v oa v ob v ic v id v e2 gnd 2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 03786-0-003 figure 3. adum2402 functional block diagram
ADUM2400/adum2401/adum2402 preliminary technical data rev. prd| page 2 of 23 electrical characteristics5 v operation 1 4.5 v v dd1 5.5 v, 4.5 v v dd2 5.5 v. all min/max specifications apply over the entire recommended operation range, unless otherwise noted. all typical specifications are at t a = 25c, v dd1 = v dd2 = 5 v. table 1. parameter symbol min typ max unit test conditions dc specifications input supply current, per channel, quiescent i ddi(q) 0.50 0.53 ma output supply current, per channel, quiescent i ddo(q) 0.19 0.21 ma ADUM2400, total supply current, four channels 2 dc to 2 mbps v dd1 supply current i dd1(q) 2.2 2.8 ma dc to 1 mhz logic signal freq. v dd2 supply current i dd2(q) 0.9 1.4 ma dc to 1 mhz logic signal freq. 10 mbps (brwz and crwz grades only) v dd1 supply current i dd1(10) 8.6 10.6 ma 5 mhz logic signal freq. v dd2 supply current i dd2(10) 2.6 3.5 ma 5 mhz logic signal freq. 90 mbps (crwz grade only) v dd1 supply current i dd1(90) 76 100 ma 45 mhz logic signal freq. v dd2 supply current i dd2(90) 21 25 ma 45 mhz logic signal freq. adum2401, total supply current, four channels 2 dc to 2 mbps v dd1 supply current i dd1(q) 1.8 2.4 ma dc to 1 mhz logic signal freq. v dd2 supply current i dd2(q) 1.2 1.8 ma dc to 1 mhz logic signal freq. 10 mbps (brwz and crwz grades only) v dd1 supply current i dd1(10) 7.1 9.0 ma 5 mhz logic signal freq. v dd2 supply current i dd2(10) 4.1 5.0 ma 5 mhz logic signal freq. 90 mbps (crwz grade only) v dd1 supply current i dd1(90) 62 82 ma 45 mhz logic signal freq. v dd2 supply current i dd2(90) 35 43 ma 45 mhz logic signal freq. adum2402, total supply current, four channels 2 dc to 2 mbps v dd1 or v dd2 supply current i dd1(q) , i dd2(q) 1.5 2.1 ma dc to 1 mhz logic signal freq. 10 mbps (brwz and crwz grades only) v dd1 or v dd2 supply current i dd1(10) , i dd2(10) 5.6 7.0 ma 5 mhz logic signal freq. 90 mbps (crwz grade only) v dd1 or v dd2 supply current i dd1(90) , i dd2(90) 49 62 ma 45 mhz logic signal freq. for all models input currents i ia , i ib , i ic , i id , i e1 , i e2 C10 0.01 10 a 0 v ia , v ib , v ic , v id v dd1 or v dd2 , 0 v e1 , v e2 v dd1 or v dd2 logic high input threshold v ih , v eh 2.0 v logic low input threshold v il , v el 0.8 v dd1, v dd2 C 0.1 5.0 v i ox = C20 a, v ix = v ixh logic high output voltages v oah , v obh , v och , v odh v dd1, v dd2 C 0.4 4.8 v i ox = C4 ma, v ix = v ixh 0.0 0.1 v i ox = 20 a, v ix = v ixl 0.04 0.1 v i ox = 400 a, v ix = v ixl logic low output voltages v oal , v obl , v ocl , v odl 0.2 0.4 v i ox = 4 ma, v ix = v ixl
preliminary technical data ADUM2400/adum2401/adum2402 rev. prd | page 3 of 23 parameter symbol min typ max unit test conditions switching specifications adum240xarw minimum pulsewidth 3 pw 1000 ns c l = 15 pf, cmos signal levels maximum data rate 4 1 mbps c l = 15 pf, cmos signal levels propagation delay 5 t phl , t plh 50 65 100 ns c l = 15 pf, cmos signal levels pulsewidth distortion, |t plh -t phl | 5 pwd 40 ns c l = 15 pf, cmos signal levels propagation delay skew 6 t psk 50 ns c l = 15 pf, cmos signal levels channel-to-channel matching 7 t pskcd/od 50 ns c l = 15 pf, cmos signal levels adum240xbrw minimum pulsewidth 3 pw 100 ns maximum data rate 4 10 mbps c l = 15 pf, cmos signal levels c l = 15 pf, cmos signal levels propagation delay 5 t phl , t plh 20 32 50 ns c l = 15 pf, cmos signal levels pulsewidth distortion, |t plh C t phl | 5 pwd 3 ns c l = 15 pf, cmos signal levels change versus temperature 5 ps/c c l = 15 pf, cmos signal levels propagation delay skew 6 t psk 15 ns c l = 15 pf, cmos signal levels channel-to-channel matching, co-directional channels 7 t pskcd 3 ns c l = 15 pf, cmos signal levels channel-to-channel matching, opposing-directional channels 7 t pskod 6 ns c l = 15 pf, cmos signal levels adum240xcrw minimum pulsewidth 3 pw 8.3 11.1 ns c l = 15 pf, cmos signal levels maximum data rate 4 90 120 mbps c l = 15 pf, cmos signal levels propagation delay 5 t phl , t plh 18 27 32 ns c l = 15 pf, cmos signal levels pulsewidth distortion, |t plh C t phl | 5 pwd 0.5 2 ns c l = 15 pf, cmos signal levels change versus temperature 3 ps/c c l = 15 pf, cmos signal levels propagation delay skew 6 t psk 10 ns c l = 15 pf, cmos signal levels channel-to-channel matching, co-directional channels 7 t pskcd 2 ns c l = 15 pf, cmos signal levels channel-to-channel matching, opposing-directional channels 7 t pskod 5 ns c l = 15 pf, cmos signal levels for all models output disable propagation delay (high/low to high impedance) t phz , t plh 6 8 ns c l = 15 pf, cmos signal levels output enable propagation delay (high impedance to high/low) t pzh , t pzl 6 8 ns c l = 15 pf, cmos signal levels output rise/fall time (10%C90%) t r /t f 2.5 ns c l = 15 pf, cmos signal levels common-mode transient immunity at logic high output 8 |cm h | 25 35 kv/s v ix = v dd1/dd2 , v cm = 1000 v, transient magnitude = 800 v common-mode transient immunity at logic low output 8 |cm l | 25 35 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 800 v refresh rate f r 1.2 mbps input dynamic supply current, per channel 9 i ddi(d) 0.19 ma/mbps output dynamic supply current, per channel 9 i ddo(d) 0.05 ma/mbps see notes on next page.
ADUM2400/adum2401/adum2402 preliminary technical data rev. prd| page 4 of 23 notes 1 all voltages are relative to their respective ground. 2 supply current values are for all four channe ls combined running at identi cal data rates. output supply current values are spec ified with no output load present. the supply current associated with an individual ch annel operating at a given data rate may be calculated as described in the power consumption sect ion on page 20 . see figure 8 through figure 10 for information on per-channel supply current as a functi on of data rate for unloaded and loaded conditions. see figure 11 through figure 14 for total i dd1 and i dd2 supply currents as a function of data rate for ADUM2400/adum24 01/adum2402 channel configurations. 3 the minimum pulsewidth is the shortest pulsewidth at which the specified pulsewidth distortion is guaranteed. 4 the maximum data rate is the fastest data rate at which the specified pulsewidth distortion is guaranteed. 5 t phl propagation delay is measured from the 50% level of the falling edge of the v ix signal to the 50% level of the falling edge of the v ox signal. t plh propagation delay is measured from the 50% level of the rising edge of the v ix signal to the 50% level of the rising edge of the v ox signal. 6 t psk is the magnitude of the worst-case difference in t phl or t plh that will be measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 7 co-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two chann els with inputs on the same side of the isolation barrier. opposi ng-directional channe l-to-channel matching is the absolute va lue of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 8 cm h is the maximum common-mode voltage slew rate that can be sustained while maintaining v o > 0.8v dd2 . cm l is the maximum common-mod e voltage slew rate than can be sustained while maintaining v o < 0.8 v. the common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. the transient magnitude is the range over which the common mode is slewed. 9 dynamic supply current is the incremental amou nt of supply current required for a 1 mbps increase in signal data rate. see fig ure 8 through figure 10 for information on per-channel supply current for unloaded and loaded conditions. see power consumption section on page 19 for guid ance on calculating per- channel supply current for a given data rate.
preliminary technical data ADUM2400/adum2401/adum2402 rev. prd | page 5 of 23 electrical characteristics3 v operation 1 2.7 v v dd1 3.6 v, 2.7 v v dd2 3.6 v. all min/max specifications apply over the entire recommended operation range, unless otherwise noted. all typical specifications are at t a = 25 c, v dd1 = v dd2 = 3.0 v. table 2. parameter symbol min typ max unit test conditions dc specifications input supply current, per channel, quiescent i ddi(q) 0.26 0.31 ma output supply current, per channel, quiescent i ddo(q) 0.11 0.14 ma ADUM2400, total supply current, four channels 2 dc to 2 mbps v dd1 supply current i dd1(q) 1.2 1.9 ma dc to 1 mhz logic signal freq. v dd2 supply current i dd2(q) 0.5 0.9 ma dc to 1 mhz logic signal freq. 10 mbps (brwz and crwz grades only) v dd1 supply current i dd1(10) 4.5 6.5 ma 5 mhz logic signal freq. v dd2 supply current i dd2(10) 1.4 2.0 ma 5 mhz logic signal freq. 90 mbps (crwz grade only) v dd1 supply current i dd1(90) 42 65 ma 45 mhz logic signal freq. v dd2 supply current i dd2(90) 11 15 ma 45 mhz logic signal freq. adum2401, total supply current, four channels 2 dc to 2 mbps v dd1 supply current i dd1(q) 1.0 1.6 ma dc to 1 mhz logic signal freq. v dd2 supply current i dd2(q) 0.7 1.2 ma dc to 1 mhz logic signal freq. 10 mbps (brwz and crwz grades only) v dd1 supply current i dd1(10) 3.7 5.4 ma 5 mhz logic signal freq. v dd2 supply current i dd2(10) 2.2 3.0 ma 5 mhz logic signal freq. 90 mbps (crwz grade only) v dd1 supply current i dd1(90) 34 52 ma 45 mhz logic signal freq. v dd2 supply current i dd2(90) 19 27 ma 45 mhz logic signal freq. adum2402, total supply current, four channels 2 dc to 2 mbps v dd1 or v dd2 supply current i dd1(q) , i dd2(q) 0.9 1.5 ma dc to 1 mhz logic signal freq. 10 mbps (brwz and crwz grades only) v dd1 or v dd2 supply current i dd1(10) , i dd2(10) 3.0 4.2 ma 5 mhz logic signal freq. 90 mbps (crwz grade only) v dd1 or v dd2 supply current i dd1(90) , i dd2(90) 27 39 ma 45 mhz logic signal freq. for all models input currents i ia , i ib , i ic, i id , i e1 , i e2 C10 0.01 10 a 0 v ia , v ib , v ic , v id v dd1 or v dd2 , 0 v e1 ,v e2 v dd1 or v dd2 logic high input threshold v ih , v eh 1.6 v logic low input threshold v il , v el 0.4 v dd1, v dd2 C 0.1 3.0 v i ox = C20 a, v ix = v ixh logic high output voltages v oah , v obh , v och , v odh v dd1, v dd2 C 0.4 2.8 v i ox = C4 ma, v ix = v ixh 0.0 0.1 v i ox = 20 a, v ix = v ixl 0.04 0.1 v i ox = 400 a, v ix = v ixl logic low output voltages v oal , v obl , v ocl , v odl 0.2 0.4 v i ox = 4 ma, v ix = v ixl
ADUM2400/adum2401/adum2402 preliminary technical data rev. prd| page 6 of 23 parameter symbol min typ max unit test conditions switching specifications adum240xarw minimum pulsewidth 3 pw 1000 ns c l = 15pf, cmos signal levels maximum data rate 4 1 mbps c l = 15pf, cmos signal levels propagation delay 5 t phl , t plh 50 75 100 ns c l = 15pf, cmos signal levels pulsewidth distortion, |t plh C t phl | 5 pwd 40 ns c l = 15pf, cmos signal levels propagation delay skew 6 t psk 50 ns c l = 15pf, cmos signal levels channel-to-channel matching 7 t pskcd/od 50 ns c l = 15pf, cmos signal levels adum240xbrw minimum pulsewidth 3 pw 100 ns c l = 15pf, cmos signal levels maximum data rate 4 10 mbps c l = 15pf, cmos signal levels propagation delay 5 t phl , t plh 20 38 50 ns c l = 15pf, cmos signal levels pulsewidth distortion, |t plh C t phl | 5 pwd 3 ns c l = 15pf, cmos signal levels change versus temperature 5 ps/c c l = 15pf, cmos signal levels propagation delay skew 6 t psk 22 ns c l = 15pf, cmos signal levels channel-to-channel matching, co-directional channels 7 t pskcd 3 ns c l = 15pf, cmos signal levels channel-to-channel matching, opposing-directional channels 7 t pskod 6 ns c l = 15pf, cmos signal levels adum240xcrw minimum pulsewidth 3 pw 8.3 11.1 ns c l = 15pf, cmos signal levels maximum data rate 4 90 120 mbps c l = 15pf, cmos signal levels propagation delay 5 t phl , t plh 20 34 45 ns c l = 15pf, cmos signal levels pulsewidth distortion, |t plh C t phl | 5 pwd 0.5 2 ns c l = 15pf, cmos signal levels change versus temperature 3 ps/c c l = 15pf, cmos signal levels propagation delay skew 6 t psk 16 ns c l = 15pf, cmos signal levels channel-to-channel matching, co-directional channels 7 t pskcd 2 ns c l = 15pf, cmos signal levels channel-to-channel matching, opposing-directional channels 7 t pskod 5 ns c l = 15pf, cmos signal levels for all models output disable propagation delay (high/low to high impedance) t phz , t plh 6 8 ns c l = 15pf, cmos signal levels output enable propagation delay (high impedance to high/low) t pzh , t pzl 6 8 ns c l = 15pf, cmos signal levels output rise/fall time (10%C90%) t r /t f 3 ns c l = 15pf, cmos signal levels common mode transient immunity at logic high output 8 |cm h | 25 35 kv/s v ix = v dd1/dd2 , v cm = 1000 v, transient magnitude = 800 v common mode transient immunity at logic low output 8 |cm l | 25 35 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 800 v refresh rate f r 1.1 mbps input dynamic supply current, per channel 9 i ddi(d) 0.10 ma/mbps output dynamic supply current, per channel 9 i ddo(d) 0.03 ma/mbps see notes on next page.
preliminary technical data ADUM2400/adum2401/adum2402 rev. prd | page 7 of 23 notes 1 all voltages are relative to their respective ground. 2 supply current values are for all four channe ls combined running at identi cal data rates. output supply current values are spec ified with no output load present. the supply current associated with an individual ch annel operating at a given data rate may be calculated as described in the power consumption sect ion on page 20 . see figure 8 through figure 10 for information on per-channel supply current as a functi on of data rate for unloaded and loaded conditions. see figure 11 through figure 14 for total i dd1 and i dd2 supply currents as a function of data rate for ADUM2400/adum24 01/adum2402 channel configurations. 3 the minimum pulsewidth is the shortest pulsewidth at which the specified pulsewidth distortion is guaranteed. 4 the maximum data rate is the fastest data rate at which the specified pulsewidth distortion is guaranteed. 5 t phl propagation delay is measured from the 50% level of the falling edge of the v ix signal to the 50% level of the falling edge of the v ox signal. t plh propagation delay is measured from the 50% level of the rising edge of the v ix signal to the 50% level of the rising edge of the v ox signal. 6 t psk is the magnitude of the worst-case difference in t phl or t plh that will be measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 7 co-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two chann els with inputs on the same side of the isolation barrier. opposi ng-directional channe l-to-channel matching is the absolute va lue of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 8 cm h is the maximum common-mode voltage slew rate that can be sustained while maintaining v o > 0.8v dd2 . cm l is the maximum common-mod e voltage slew rate than can be sustained while maintaining v o < 0.8 v. the common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. the transient magnitude is the range over which the common mode is slewed. 9 dynamic supply current is the incremental amou nt of supply current required for a 1 mbps increase in signal data rate. see fig ure 8 through figure 10 for information on per-channel supply current for unloaded and loaded conditions. see power consumption section on page 19 for guid ance on calculating per- channel supply current for a given data rate.
ADUM2400/adum2401/adum2402 preliminary technical data rev. prd| page 8 of 23 electrical characteristicsmixed 5 v/3 v or 3 v/5 v operation 1 5 v/3 v operation: 4.5 v v dd1 5.5 v, 2.7 v v dd2 3.6 v. 3 v/5 v operation: 2.7 v v dd1 3.6 v, 4.5 v v dd2 5.5 v. all min/max specifications apply over the entire recommended operation range, unless otherwise noted. all typical specifications are at t a =25c; v dd1 = 3.0 v, v dd2 = 5 v; or v dd1 = 5 v, v dd2 = 3.0 v. table 3. parameter symbol min typ max unit test conditions dc specifications input supply current, per channel, quiescent i ddi(q) 5 v/3 v operation 0.50 0.53 ma 3 v/5 v operation 0.26 0.31 ma output supply current, per channel, quiescent i ddo(q) 5 v/3 v operation 0.11 0.14 ma 3 v/5 v operation 0.19 0.21 ma ADUM2400, total supply current, four channels 2 dc to 2 mbps v dd1 supply current i dd1(q) 5 v/3 v operation 2.2 2.8 ma dc to 1 mhz logic signal freq. 3 v/5 v operation 1.2 1.9 ma dc to 1 mhz logic signal freq. v dd2 supply current i dd2(q) 5 v/3 v operation 0.5 0.9 ma dc to 1 mhz logic signal freq. 3 v/5 v operation 0.9 1.4 ma dc to 1 mhz logic signal freq. 10 mbps (brwz and crwz grades only) v dd1 supply current i dd1(10) 5 v/3 v operation 8.6 10.6 ma 5 mhz logic signal freq. 3 v/5 v operation 4.5 6.5 ma 5 mhz logic signal freq. v dd2 supply current i dd2(10) 5 v/3 v operation 1.4 2.0 ma 5 mhz logic signal freq. 3 v/5 v operation 2.6 3.5 ma 5 mhz logic signal freq. 90 mbps (crwz grade only) v dd1 supply current i dd1(90) 5 v/3 v operation 76 100 ma 45 mhz logic signal freq. 3 v/5 v operation 42 65 ma 45 mhz logic signal freq. v dd2 supply current i dd2(90) 5 v/3 v operation 11 15 ma 45 mhz logic signal freq. 3 v/5 v operation 21 25 ma 45 mhz logic signal freq. adum2401, total supply current, four channels 2 dc to 2 mbps v dd1 supply current i dd1(q) 5 v/3 v operation 1.8 2.4 ma dc to 1 mhz logic signal freq. 3 v/5 v operation 1.0 1.6 ma dc to 1 mhz logic signal freq. v dd2 supply current i dd2(q) 5 v/3 v operation 0.7 1.2 ma dc to 1 mhz logic signal freq. 3 v/5 v operation 1.2 1.8 ma dc to 1 mhz logic signal freq. 10 mbps (brwz and crwz grades only) v dd1 supply current i dd1(10) 5 v/3 v operation 7.1 9.0 ma 5 mhz logic signal freq. 3 v/5 v operation 3.7 5.4 ma 5 mhz logic signal freq. v dd2 supply current i dd2(10) 5 v/3 v operation 2.2 3.0 ma 5 mhz logic signal freq. 3 v/5 v operation 4.1 5.0 ma 5 mhz logic signal freq. 90 mbps (crwz grade only) v dd1 supply current i dd1(90)
preliminary technical data ADUM2400/adum2401/adum2402 rev. prd | page 9 of 23 parameter symbol min typ max unit test conditions 5 v/3 v operation 62 82 ma 45 mhz logic signal freq. 3 v/5 v operation 34 52 ma 45 mhz logic signal freq. v dd2 supply current i dd2(90) 5 v/3 v operation 19 27 ma 45 mhz logic signal freq. 3 v/5 v operation 35 43 ma 45 mhz logic signal freq. adum2402, total supply current, four channels 2 dc to 2 mbps v dd1 supply current i dd1(q) 5 v/3 v operation 1.5 2.1 ma dc to 1 mhz logic signal freq. 3 v/5 v operation 0.9 1.5 ma dc to 1 mhz logic signal freq. v dd2 supply current i dd2(q) 5 v/3 v operation 0.9 1.5 ma dc to 1 mhz logic signal freq. 3 v/5 v operation 1.5 2.1 ma dc to 1 mhz logic signal freq. 10 mbps (brwz and crwz grades only) v dd1 supply current i dd1(10) 5 v/3 v operation 5.6 7.0 ma 5 mhz logic signal freq. 3 v/5 v operation 3.0 4.2 ma 5 mhz logic signal freq. v dd2 supply current i dd2(10) 5 v/3 v operation 3.0 4.2 ma 5 mhz logic signal freq. 3 v/5 v operation 5.6 7.0 ma 5 mhz logic signal freq. 90 mbps (crwz grade only) v dd1 supply current i dd1(90) 5 v/3 v operation 49 62 ma 45 mhz logic signal freq. 3 v/5 v operation 27 39 ma 45 mhz logic signal freq. v dd2 supply current i dd2(90) 5 v/3 v operation 27 39 ma 45 mhz logic signal freq. 3 v/5 v operation 49 62 ma 45 mhz logic signal freq. for all models input currents i ia , i ib , i ic , i id , i e1 , i e2 C10 0.01 10 a 0 v ia ,v ib , v ic ,v id v dd1 or v dd2 , 0 v e1 ,v e2 v dd1 or v dd2 logic high input threshold v ih , v eh 5 v/3 v operation 2.0 v 3 v/5 v operation 1.6 v logic low input threshold v il , v el 5 v/3 v operation 0.8 v 3 v/5 v operation 0.4 v v dd1 /v dd2 C 0.1 v dd1/ v dd2 v i ox = C20 a, v ix = v ixh logic high output voltages v oah , v obh , v och , v odh v dd1 /v dd2 C 0.4 v dd1 / v dd2 C 0.2 v i ox = C4 ma, v ix = v ixh 0.0 0.1 v i ox = 20 a, v ix = v ixl 0.04 0.1 v i ox = 400 a, v ix = v ixl logic low output voltages v oal, v obl, v ocl , v odl 0.2 0.4 v i ox = 4 ma, v ix = v ixl switching specifications adum240xarw minimum pulsewidth 3 pw 1000 ns c l = 15pf, cmos signal levels maximum data rate 4 1 mbps c l = 15pf, cmos signal levels propagation delay 5 t phl , t plh 50 70 100 ns c l = 15pf, cmos signal levels pulsewidth distortion, |t plh C t phl | 5 pwd 40 ns c l = 15pf, cmos signal levels propagation delay skew 6 t psk 50 ns c l = 15pf, cmos signal levels channel-to-channel matching 7 t pskcd/od 50 ns c l = 15pf, cmos signal levels adum240xbrw
ADUM2400/adum2401/adum2402 preliminary technical data rev. prd| page 10 of 23 parameter symbol min typ max unit test conditions minimum pulsewidth 3 pw 100 ns maximum data rate 4 10 mbps c l = 15pf,cmos signal levels c l = 15pf, cmos signal levels propagation delay 5 t phl , t plh 15 35 50 ns c l = 15pf, cmos signal levels pulsewidth distortion, |t plh C t phl | 5 pwd 3 ns c l = 15pf, cmos signal levels change versus temperature 5 ps/c c l = 15pf, cmos signal levels propagation delay skew 6 t psk 22 ns c l = 15pf, cmos signal levels channel-to-channel matching, co-directional channels 7 t pskcd 3 ns c l = 15pf, cmos signal levels channel-to-channel matching, opposing-directional channels 7 t pskod 6 ns c l = 15pf, cmos signal levels adum240xcrw minimum pulsewidth 3 pw 8.3 11.1 ns maximum data rate 4 90 120 mbps c l = 15pf, cmos signal levels c l = 15pf, cmos signal levels propagation delay 5 t phl , t plh 20 30 40 ns c l = 15pf, cmos signal levels pulsewidth distortion, |t plh -t phl | 5 pwd 0.5 2 ns c l = 15pf, cmos signal levels change versus temperature 3 ps/c c l = 15pf, cmos signal levels propagation delay skew 6 t psk 14 ns c l = 15pf, cmos signal levels channel-to-channel matching, co-directional channels 7 t pskcd 2 ns c l = 15pf, cmos signal levels channel-to-channel matching, opposing-directional channels 7 t pskod 5 ns c l = 15pf, cmos signal levels for all models output disable propagation delay (high/low to high impedance) t phz , t plh 6 8 ns c l = 15pf, cmos signal levels output enable propagation delay (high impedance to high/low) t pzh , t pzl 6 8 ns c l = 15pf, cmos signal levels output rise/fall time (10-90%) t r /t f c l = 15pf, cmos signal levels 5 v/3 v operation 3.0 ns 3 v/5 v operation 2.5 ns common-mode transient immunity at logic high output 8 |cm h | 25 35 kv/s v ix = v dd1/dd2 , v cm = 1000 v, transient magnitude = 800 v common-mode transient immunity at logic low output 8 |cm l | 25 35 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 800 v refresh rate f r 5 v/3 v operation 1.2 mbps 3 v/5 v operation 1.1 mbps input dynamic supply current, per channel 9 i ddi(d) 5 v/3 v operation 0.19 ma/mbps 3 v/5 v operation 0.10 ma/mbps output dynamic supply current, per channel 9 i ddi(d) 5 v/3 v operation 0.03 ma/mbps 3 v/5 v operation 0.05 ma/mbps see notes on next page.
preliminary technical data ADUM2400/adum2401/adum2402 rev. prd | page 11 of 23 notes 1 all voltages are relative to their respective ground. 2 supply current values are for all four channe ls combined running at identi cal data rates. output supply current values are spec ified with no output load present. the supply current associated with an individual ch annel operating at a given data rate may be calculated as described in the power consumption sect ion on page 20. see figure 8 through figure 10 for information on per-channel supply current as a functi on of data rate for unloaded and loaded conditions. see figure 11 through figure 14 for total i dd1 and i dd2 supply currents as a function of data rate for ADUM2400/adum24 01/adum2402 channel configurations. 3 the minimum pulsewidth is the shortest pulsewidth at which the specified pulsewidth distortion is guaranteed. 4 the maximum data rate is the fastest data rate at which the specified pulsewidth distortion is guaranteed. 5 t phl propagation delay is measured from the 50% level of the falling edge of the v ix signal to the 50% level of the falling edge of the v ox signal. t plh propagation delay is measured from the 50% level of the rising edge of the v ix signal to the 50% level of the rising edge of the v ox signal. 6 t psk is the magnitude of the worst-case difference in t phl or t plh that will be measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 7 co-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two chann els with inputs on the same side of the isolation barrier. opposi ng-directional channe l-to-channel matching is the absolute va lue of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 8 cm h is the maximum common-mode voltage slew rate that can be sustained while maintaining v o > 0.8v dd2 . cm l is the maximum common-mod e voltage slew rate than can be sustained while maintaining v o < 0.8 v. the common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. the transient magnitude is the range over which the common mode is slewed. 9 dynamic supply current is the incremental amou nt of supply current required for a 1 mbps increase in signal data rate. see fig ure 8 through figure 10 for information on per-channel supply current for unloaded and loaded conditions. see power consumption section on page 19 for guid ance on calculating per- channel supply current for a given data rate.
ADUM2400/adum2401/adum2402 preliminary technical data rev. prd| page 12 of 23 package characteristics table 4. parameter symbol min typ max unit test conditions resistance (input-output) 1 r i-o 10 12 ? capacitance (input-output) 1 c i-o 2.2 pf f = 1 mhz input capacitance 2 c i 4.0 pf ic junction-to-case thermal resistance, side 1 jci 33 c/w ic junction-to-case thermal resistance, side 2 jco 28 c/w thermocouple located at center of package underside notes 1 device considered a two -terminal device: pins 1, 2, 3, 4, 5, 6, 7, and 8 shorted together and pins 9, 10, 11, 12, 13, 14, 15, and 16 shorted together. 2 input capacitance is from any input data pin to ground. regulatory information (pending) the adum240x will approved upon product release by the following organizations: table 5. ul 1 csa vde 2 recognized under 1577 component recognition program 1 double insulation, 5000 v rms isolation voltage approved under csa component acceptance notice #5a reinforced insulation per csa 60950-1-03 and iec 60950-1, 400 v rms maximum working voltage approved per iec 60601-1 reinforced insulation, 250 v rms maximum working voltage certified according to din en 60747-5-2 (vde 0884 part 2):2003-01 2 basic insulation, 848 v peak complies with din en 60747-5-2 (vde 0884 part 2):2003-01, din en 60950 (vde 0805):2001-12; en 60950:2000 reinforced insulation, 565 v peak notes 1 in accordance with ul1577, each ad um240x is proof tested by applying an insulation test vo ltage 6000 v rms for 1 second (curr ent leakage detectio n limit = 5 a). 2 in accordance with din en 60747-5-2, each adum240x is proof tested by applying an insulation test voltage 1050 v peak for 1 s econd (partial discharge detection limit = 5 pc). insulation and safety-related specifications table 6. parameter symbol value unit conditions rated dielectric insulation volt age 5000 v rms 1 minute duration. minimum external air gap (clearance) l(i01) 7.45 min. mm measured from input termin als to output terminals, shortest distance through air. minimum external tracking (creepage) l(i02) 8.10 min. mm measured from input termin als to output terminals, shortest distance path along body. minimum internal gap (internal clearance) 0.025 min. mm insulation distance through insulation. tracking resistance (comparative tracking index) cti >175 v din iec 112/vde 0303 part 1. isolation group iiia material gr oup (din vde 0110, 1/89, table 1).
preliminary technical data ADUM2400/adum2401/adum2402 rev. prd | page 13 of 23 din en 60747-5-2 (vde 0884 part 2) in sulation characteristics (pending) table 7. description symbol characteristic unit installation classification per din vde 0110 for rated mains voltage 300 v rms for rated mains voltage 600 v rms iCiv iCiii climatic classification 40/105/21 pollution degree (din vde 0110, table 1) 2 maximum working insulation voltage v iorm 848 v peak input to output test voltage, method b1 v iorm 1.875 = v pr , 100% production test, t m = 1 sec, partial discharge < 5 pc v pr 1590 v peak input to output test voltage, method a after environmental tests subgroup 1) v iorm 1.6 = v pr , t m = 60 sec, partial discharge < 5p c after input and/or safe ty test subgroup 2/3) v iorm 1.2 = v pr , t m = 60 sec, partial discharge < 5p c v pr 1356 1018 v peak v peak highest allowable overvoltage (transient overvoltage, t tr = 10 sec) v tr 6000 v peak safety-limiting values (max imum value allowed in the event of a failure, also see thermal derating curve, figure 4) case temperature side 1 current side 2 current t s i s1 i s2 150 265 335 c ma ma insulation resistance at t s , v io = 500 v r s >10 9 ? this isolator is suitable for basic electrical isolation only within the safety limit data. maintenance of the safety data shal l be ensured by means of protective circuits. "*" marking on packages denotes din en 60747-5-2 approval for 560 v peak working voltage. case temperature (c) safety-limiting current (ma) 0 0 350 300 250 200 150 100 50 50 100 150 200 side #1 side #2 03787-0-003 figure 4. thermal derating curve, dependence of safety limiting values with case temperature per din en 60747-5-2 recommended operat ing conditions table 8. parameter symbol min max unit operating temperature t a C40 +105 c supply voltages 1 v dd1, v dd 2 2.7 5.5 v input signal rise and fall times 1.0 ms note 1 all voltages are relative to their respective ground. see the dc correctness and magnetic field immunity section on page 19 for information on immunity to external magnetic fields.
ADUM2400/adum2401/adum2402 preliminary technical data rev. prd| page 14 of 23 absolute maximum ratings table 9. parameter symbol min max unit storage temperature t st C65 150 c ambient operating temperature t a C40 105 c supply voltages 1 v dd1, v dd2 C0.5 7.0 v input voltage 1, 2 v ia, v ib, v ic , v id , v e1 ,v e2 C0.5 v ddi + 0.5 v output voltage 1, 2 v oa, v ob, v oc, v od C0.5 v ddo + 0.5 v average output current, per pin 3 side 1 i o1 C18 18 ma side 2 i o2 C22 22 ma common-mode transients 4 C100 +100 kv/s notes 1 all voltages are relative to their respective ground. 2 v ddi and v ddo refer to the supply voltages on the input and output sides of a given channel, respectively. see pc board layout section. 3 see figure 4 for maximum rated current values for various temperatures. 4 refers to common-mode transients across the insulation barrier. common-mode transients exceeding the absolute maximum rating m ay cause latch-up or permanent damage. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating on ly; functional operation of the device at these or any other conditions above those listed in the operational sections of this spec ification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. ambient temperature = 25c, unless otherwise noted. table 10. truth table (positive logic) v ix input 1 v ex input v ddi state 1 v ddo state 1 v ox output 1 note h h or nc powered powered h l h or nc powered powered l x l powered powered z x h or nc unpowered powered h outputs re turns to input state within 1 s of v ddi power restoration. x l unpowered powered z x x powered unpowered indeterminate outputs returns to input state within 1 s of v ddo power restoration if v ex state is h or nc. outputs return s to high impedance state within 8 ns of v ddo power restoration if v ex state is l. note 1 v ix and v ox refer to the input and output signals of a given channel (a, b, c, or d). v ex refers to the output enable signal on the same side as the v ox outputs. v ddi and v ddo refer to the supply voltages on the input and output sides of the given channel, respectively.
preliminary technical data ADUM2400/adum2401/adum2402 rev. prd | page 15 of 23 pin configurations and pi n function descriptions pin configurations figure 5. ADUM2400 pin configuration figure 6. adum2401 pin configuration figure 7. adum2402 pin configuration * pins 2 and 8 are internally connected. connecting both to gnd 1 is recommended. pins 9 and 15 are internally connected. connecting both to gnd 2 is recommended. output enable pin 10 on the ADUM2400 may be left disconnected if outputs are to be always enabled. output enable pins 7 and 10 on the adum2401/adum2402 may be left disconnected if outputs are to be always enabled. in noisy environments, connectin g pin 7 (for adum2401 and adum24 02) and pin 10 (for all models) to an external logic high or low is recommended. nc = no connect ADUM2400 top view (not to scale) 03786-0-005 *gnd *gnd nc = no connect adum2401 top view (not to scale) 03786-0-006 nc = no connect adum2402 top view (not to scale) 03786-0-007 *gnd 2 3 5 16 15 14 13 12 11 10 9 v dd2 gnd 2 * v oa v ob v oc v od v e2 gnd 2 * 1 2 3 4 5 6 7 8 v dd1 1 v ia v ib v ic v id nc 1 1 2 3 4 5 6 7 8 v dd1 *gnd 1 v ia v ib v ic v od v e1 *gnd 1 16 15 14 13 12 11 10 9 v dd2 gnd 2 * v oa v ob v oc v id v e2 gnd 2 * v dd1 1 v ia v ib v oc v od v e1 1 *gnd 16 15 14 13 12 11 10 9 v dd2 gnd 2 * v oa v ob v ic v id v e2 gnd 2 * 1 4 6 7 8
ADUM2400/adum2401/adum2402 preliminary technical data rev. prd| page 16 of 23 pin function descriptions table 11. ADUM2400 pin function descriptions pin no. mnemonic function 1 v dd1 supply voltage for isolator side 1, 2.7 v to 5.5 v. 2 gnd 1 ground 1. ground reference for isolator side 1. 3 v ia logic input a. 4 v ib logic input b. 5 v ic logic input c. 6 v id logic input d. 7 nc no connect. 8 gnd 1 ground 1. ground reference for isolator side 1. 9 gnd 2 ground 2. ground reference for isolator side 2. 10 v e2 output enable 2. active high logic input. v oa , v ob , v oc , and v od outputs are enabled when v e2 is high or disconnected. v oa , v ob , v oc , and v od outputs are disabled when v e2 is low. 11 v od logic output d. 12 v oc logic output c. 13 v ob logic output b. 14 v oa logic output a. 15 gnd 2 ground 2. ground reference for isolator side 2. 16 v dd2 supply voltage for isolator side 2, 2.7 v to 5.5 v. table 12. adum2401 pin function descriptions pin no. mnemonic function 1 v dd1 supply voltage for isolator side 1, 2.7 v to 5.5 v. 2 gnd 1 ground 1. ground reference for isolator side 1. 3 v ia logic input a. 4 v ib logic input b. 5 v ic logic input c. 6 v od logic output d. 7 v e1 output enable 1. active high logic input. v od output is enabled when v e1 is high or disconnected. v od is disabled when v e1 is low. 8 gnd 1 ground 1. ground reference for isolator side 1. 9 gnd 2 ground 2. ground reference for isolator side 2. 10 v e2 output enable 2. active high logic input. v oa , v ob , and v oc outputs are enabled when v e2 is high or disconnected. v oa , v ob , and v oc outputs are disabled when v e2 is low. 11 v id logic input d. 12 v oc logic output c. 13 v ob logic output b. 14 v oa logic output a. 15 gnd 2 ground 2. ground reference for isolator side 2. 16 v dd2 supply voltage for isolator side 1, 2.7 v to 5.5 v. table 13. adum2402 pin function descriptions pin no. mnemonic function 1 v dd1 supply voltage for isolator side 1, 2.7 v to 5.5 v. 2 gnd 1 ground 1. ground reference for isolator side 1. 3 v ia logic input a. 4 v ib logic input b. 5 v oc logic output c. 6 v od logic output d. 7 v e1 output enable 1. active high logic input. v oc and v od outputs are enabled when v e1 is high or disconnected. v oc and v od outputs are disabled when v e1 is low. 8 gnd 1 ground 1. ground reference for isolator side 1. 9 gnd 2 ground 2. ground reference for isolator side 2. 10 v e2 output enable 2. active high logic input. v oa and v ob outputs are enabled when v e2 is high or disconnected. v oa and v ob outputs are disabled when v e2 is low. 11 v id logic input d. 12 v ic logic input c. 13 v ob logic output b. 14 v oa logic output a. 15 gnd 2 ground 2. ground reference for isolator side 2. 16 v dd2 supply voltage for isolator side 2, 2.7 v to 5.5 v.
preliminary technical data ADUM2400/adum2401/adum2402 rev. prd | page 17 of 23 typical performance characteristics 04407-0-011 data rate (mbps) current/channel (ma) 0 0 10 5 15 20 20 60 80 40 100 5v 3v figure 8. typical input supply current per channel vs. data rate for 5 v and 3 v operation 04407-0-012 data rate (mbps) current/channel (ma) 0 0 3 2 1 4 5 6 20 60 80 40 100 5v 3v figure 9. typical output supply current per channel vs. data rate for 5 v and 3 v operation (no output load) 04407-0-013 data rate (mbps) current/channel (ma) 0 0 6 4 2 8 10 20 60 80 40 100 5v 3v figure 10. typical output supply current per channel vs. data rate for 5 v and 3 v operation (15 pf output load) 04407-0-014 data rate (mbps) current (ma) 0 0 40 50 20 10 30 60 70 80 20 60 80 40 100 5v 3v figure 11. typical ADUM2400 v dd1 supply current vs. data rate for 5 v and 3 v operation 04407-0-015 data rate (mbps) current (ma) 0 0 10 10 5 15 20 20 60 80 40 100 5v 3v figure 12. typical ADUM2400 v dd2 supply current vs. data rate for 5 v and 3 v operation 04407-0-016 data rate (mbps) current (ma) 0 0 25 20 15 10 5 30 50 20 60 80 40 100 5v 3v figure 13. typical adum2401 v dd1 supply current vs. data rate for 5 v and 3 v operation
ADUM2400/adum2401/adum2402 preliminary technical data rev. prd| page 18 of 23 04407-0-017 data rate (mbps) current (ma) 0 0 20 15 10 5 30 25 35 40 20 60 80 40 100 5v 3v figure 14. typical adum2401 v dd2 supply current vs. data rate for 5 v and 3 v operation 04407-0-018 data rate (mbps) current (ma) 0 0 25 20 15 10 5 45 40 35 30 50 20 60 80 40 100 5v 3v figure 15. typical adum2402 v dd1 or v dd2 supply current vs. data rate for 5 v and 3 v operation temperature (c) propagation delay (ns) ?50 ?25 25 30 35 40 05075 25 100 03786-0-023 3v 5v figure 16. propagation delay vs. temperature, c grade.
preliminary technical data ADUM2400/adum2401/adum2402 rev. prd | page 19 of 23 application information pc board layout the adum240x digital isolator requires no external interface circuitry for the logic interfaces. power supply bypassing is strongly recommended at the input and output supply pins (figure 17). bypass capacitors are most conveniently connected between pins 1 and 2 for v dd1 and between pins 15 and 16 for v dd2 . the capacitor value should be between 0.01 f and 0.1 f. the total lead length between both ends of the capacitor and the input power supply pin should not exceed 20 mm. bypassing between pins 1 and 8 and between pins 9 and 16 should also be considered unless the ground pair on each package side are connected close to the package. v dd1 gnd 1 v ia v ib v ic/oc v id/od v e1 gnd 1 v dd2 gnd 2 v oa v ob v oc/ic v od/id v e2 gnd 2 03786-0-019 figure 17. recommended printed circuit board layout in applications involving high common-mode transients, care should be taken to ensure that board coupling across the isolation barrier is minimized. furthermore, the board layout should be designed such that any coupling that does occur equally affects all pins on a given component side. failure to ensure this could cause voltage differentials between pins exceeding the devices absolute maximum ratings, thereby leading to latch-up or permanent damage. propagation delay-related parameters propagation delay is a parameter that describes the length of time it takes for a logic signal to propagate through a component. the propagation delay to a logic low output may differ from the propagation delay to a logic high. input (v ix ) output (v ox ) t plh t phl 50% 50% 03786-0-020 figure 18. propagation delay parameters pulsewidth distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the input signals timing is preserved. channel-to-channel matching refers to the maximum amount the propagation delay differs among channels within a single adum240x component. propagation delay skew refers to the maximum amount the propagation delay differs among multiple adum240x components operated under the same conditions. dc correctness and magnetic field immunity positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent via the transformer to the decoder. the decoder is bistable and is therefore either set or reset by the pulses indicating input logic transitions. in the absence of logic transitions at the input for more than 2 s, a periodic set of "refresh" pulses indicative of the correct input state are sent to ensure "dc correctness" at the output. if the decoder receives no pulses for more than about 5 s, the input side is assumed to be unpowered or nonfunctional, in which case the isolator output is forced to a default state (see table 10) by the watchdog timer circuit. the limitation on the adum240xs magnetic field immunity is set by the condition in which induced voltage in the transformers receiving coil is sufficiently large to either falsely set or reset the decoder. the analysis below defines the conditions under which this may occur. the 3 v operating condition of the adum240x is examined as it represents the most susceptible mode of operation. the pulses at the transformer output have an amplitude greater than 1.0 v. the decoder has a sensing threshold at about 0.5 v, therefore establishing a 0.5 v margin in which induced voltages can be tolerated. the voltage induced across the receiving coil is given by: v = ( Cd/dt ) r n 2 ; n = 1, 2,, n where: is magnetic flux density (gauss) n is the number of turns in the receiving coil. r n is the radius of the n th turn in the receiving coil (cm). given the geometry of the receiving coil in the adum240x and an imposed requirement that the induced voltage be at most 50% of the 0.5 v margin at the decoder, a maximum allowable magnetic field is calculated as shown in below in figure 19.
ADUM2400/adum2401/adum2402 preliminary technical data rev. prd| page 20 of 23 magnetic field frequency (hz) 100 maximum allowable magnetic flux density (kgauss) 0.001 1m 10 0.01 1k 10k 10m 0.1 1 100m 100k 03786-0-021 figure 19. maximum allowable external magnetic flux density for example, at a magnetic field frequency of 1 mhz, the maximum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 v at the receiving coil. this is about 50% of the sensing threshold and will not cause a faulty output transition. similarly, if such an event were to occur during a transmitted pulse (and was of the worst case polarity) it would reduce the received pulse from > 1.0 v to 0.75 vstill well above the 0.5 v sensing threshold of the decoder. the preceding magnetic flux density values correspond to specific current magnitudes at given distances away from the adum240x transformers. figure 20 expresses these allowable current magnitudes as a function of frequency for selected distances. as can be seen, the adum240x is extremely immune and can be affected only by extremely large currents operated at high frequency and very close to the component. for the 1 mhz example noted, one would have to place a 0.5 ka current 5 mm away from the adum240x to affect the components operation. magnetic field frequency (hz) maximum allowable current (ka) 1000 100 10 1 0.1 0.01 1k 10k 100m 100k 1m 10m distance = 5mm distance = 1m distance = 100mm 03786-0-022 figure 20. maximum allowable current for various current-to-adum240x spacings note that at combinations of strong magnetic field and high frequency, any loops formed by printed circuit board traces could induce sufficiently large error voltages to trigger the thresholds of succeeding circuitry. care should be taken in the layout of such traces to avoid this possibility. power consumption the supply current at a given channel of the adum240x isolator is a function of the supply voltage, the channels data rate, and the channels output load. for each input channel, the supply current is given by: i ddi = i ddi(q) f 0.5 f r i ddi = i ddi(d) (2 f C f r ) + i ddi(q) f > 0.5 f r for each output channel, the supply current is given by: i ddo = i ddo(q) f 0.5 f r i ddo = ( i ddo(d) + (0.5 x 10 -3 c l v ddo ) (2 f C f r ) + i ddo(q) f > 0.5 f r where: i ddi(d) , i ddo(d) are the input and output dynamic supply currents per channel (ma/mbps). c l is output load capacitance (pf). v ddo is the output supply voltage (v). f is the input logic signal frequency (mhz, half of the input data rate, nrz signaling). f r is the input stage refresh rate (mbps). i ddi(q) , i ddo(q) are the specified input and output quiescent supply currents (ma). to calculate the total i dd1 and i dd2 supply current, the supply currents for each input and output channel corresponding to i dd1 and i dd2 are calculated and totaled. figure 8 and figure 9 provide per-channel supply currents as a function of data rate for an unloaded output condition. figure 10 provides per- channel supply current as a function of data rate for a 15 pf output condition. figure 11 through figure 14 provide total i dd1 and i dd2 supply current as a function of data rate for ADUM2400/adum2401/adum2402 channel configurations.
preliminary technical data ADUM2400/adum2401/adum2402 rev. prd | page 21 of 23 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-013aa seating plane 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 2.65 (0.1043) 2.35 (0.0925) 1.27 (0.0500) bsc 16 9 8 1 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 10.50 (0.4134) 10.10 (0.3976) 8 0 0.75 (0.0295) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) 0.33 (0.0130) 0.20 (0.0079) coplanarity 0.10 figure 21. 16-lead standard small outline package [soic] wide body (rw-16) esd caution esd (electrostatic discharge) sensitive device. electrosta tic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge with out detection. although this product features proprietary esd protection circuitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. ordering guide model number of inputs, v dd1 side number of inputs, v dd2 side maximum data rate (mbps) maximum propagation delay, 5 v (ns) maximum pulsewidth distortion (ns) channel-to- channel matching, co-directional channels (ns) package description ADUM2400arwz* 4 0 1 100 40 40 16-lead wide body soic, pb-free ADUM2400brwz* 4 0 10 50 3 3 16-lead wide body soic, pb-free ADUM2400crwz* 4 0 100 32 2 2 16-lead wide body soic, pb-free adum2401arwz* 3 1 1 100 40 40 16-lead wide body soic, pb-free adum2401brwz* 3 1 10 50 3 3 16-lead wide body soic, pb-free adum2401crwz* 3 1 100 32 2 2 16-lead wide body soic, pb-free adum2402arwz* 2 2 1 100 40 40 16-lead wide body soic, pb-free adum2402brwz* 2 2 10 50 3 3 16-lead wide body soic, pb-free adum2402crwz* 2 2 100 32 2 2 16-lead wide body soic, pb-free *tape and reel is available. the additi on of an -rl suffix designates a 13 (1000 unit s) tape and reel option.
ADUM2400/adum2401/adum2402 preliminary technical data rev. prd| page 22 of 23 notes
preliminary technical data ADUM2400/adum2401/adum2402 rev. prd | page 23 of 23 notes ? 2004 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. pr05007-0-10/04(prd)

▲Up To Search▲

Price & Availability of ADUM2400

	To Download ADUM2400 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .